The new architecture, anchored by the T7 silicon, integrates networking, storage, and compute acceleration into a unified data path. The platform supports both iWARP and RoCEv2 for ultra-low latency communication, a critical requirement for GPU-to-GPU data movement in modern AI workloads. By offloading complex protocol tasks—including NVMe/TCP, iSCSI, and TLS/IPsec—the company intends to eliminate I/O bottlenecks while maintaining software compatibility with its legacy T4 through T6 product lines.
In section Releases
Chelsio Debuts 400Gb Ethernet Platform to Challenge Proprietary AI Fabrics
Chelsio Communications has unveiled its seventh-generation AI Interconnect Platform, a suite of SmartNICs, storage controllers, and data processing units designed to push Ethernet into the high-performance arena. By delivering 400Gb RDMA capabilities, the company aims to provide a scalable, standards-based alternative to the proprietary interconnects currently dominating large-scale AI training clusters.
Kianoosh Naghshineh, CEO of Chelsio Communications, characterized the launch as a pivot toward making Ethernet a primary driver for large-scale AI infrastructure. The company is positioning the hardware to offer the cost and flexibility benefits of open networking without sacrificing the performance headroom required for real-time inference. While the SmartNICs and storage controllers are available for immediate deployment, the T7 DPUs are currently shipping as evaluation units, with full production slated for December 2026.
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